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Proceedings Paper

Moving-images time gradient implementation using RAM-based FPGA
Author(s): Luis L. Nozal; Gerardo Aranguren; Jose Luis Martin; Joseba Ezquerra
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Paper Abstract

Time gradient can be used to extract information from motion.It has been already done, but higher performances are reached if it's computed on real time. We propose an architecture to evaluate it from consecutive images in a video signa. Behind a delaying structure, a circuit operates over the neighborhood of pixels around each one: not only the adjacent pixels in space but also in time. Gradient can be extracted from all of them by convolution, and other nonlinear algorithms can also be applied. Known 3 by 3 masks to operate over static images are generalized by 3D masks to operate over dynamic images. The circuit is based on field programmable gate array (FPGA) devices, then a set of specific purpose hardware designs can be loaded on RAM cells in FPGA, so it's fast as hardware and versatile as software, and different approaches of gradient can be implemented from host computer to programmable logic in FPGA.

Paper Details

Date Published: 3 April 1997
PDF: 9 pages
Proc. SPIE 3028, Real-Time Imaging II, (3 April 1997); doi: 10.1117/12.270337
Show Author Affiliations
Luis L. Nozal, Univ. del Pais Vasco (Spain)
Gerardo Aranguren, Univ. del Pais Vasco (Spain)
Jose Luis Martin, Univ. del Pais Vasco (Spain)
Joseba Ezquerra, Univ. del Pais Vasco (Spain)


Published in SPIE Proceedings Vol. 3028:
Real-Time Imaging II
Divyendu Sinha, Editor(s)

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