Share Email Print
cover

Proceedings Paper

Design methodology for programmable video signal processors
Author(s): Andrew Wolfe; Wayne H. Wolf; Santanu Dutta; Jason E. Fritts
Format Member Price Non-Member Price
PDF $14.40 $18.00

Paper Abstract

This paper presents a design methodology for a high- performance, programmable video signal processor (VSP). The proposed design methodology explores both technology-driven hardware tradeoffs and application-driven architectural tradeoffs for optimizing cost and performance within a class of processor architectures. In particular, this methodology allows concurrent consideration of these competing factors at different levels of design sophistication, ranging from early design exploration towards full processor simulation. We present the results of this methodology for an aggressive very-long-instruction-word (VLIW) video signal processor design and discuss its utility for other programmable signal processor designs.

Paper Details

Date Published: 17 January 1997
PDF: 6 pages
Proc. SPIE 3021, Multimedia Hardware Architectures 1997, (17 January 1997); doi: 10.1117/12.263523
Show Author Affiliations
Andrew Wolfe, Princeton Univ. (United States)
Wayne H. Wolf, Princeton Univ. (United States)
Santanu Dutta, Princeton Univ. (United States)
Jason E. Fritts, Princeton Univ. (United States)


Published in SPIE Proceedings Vol. 3021:
Multimedia Hardware Architectures 1997
Sethuraman Panchanathan; Frans Sijstermans, Editor(s)

© SPIE. Terms of Use
Back to Top