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Proceedings Paper

Automatic layout of integrated-optic time-of-flight circuits
Author(s): Ruth D. Fogg
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Paper Abstract

This work describes the architecture and algorithms used in the computer-aided design tool developed for the automatic layout of integrated-optic, time-of-flight circuit designs. As in VLSI circuit layout, total wire length and chip area minimization are the goals in the layout of time-of-flight circuits. However, there are two major differences between the layout of time of flight circuits and VLSI circuits. First, the interconnection lengths of time-of-flight designs are exactly specified in order to achieve the necessary delays for signal synchronization. SEcondly, the switching elements are 120 times longer than they are wide. This highly astigmatic aspect ratio causes severe constraints on how and where the switches are placed. Assuming the continued development of corner turning mirrors allows the use of a parallel, row-based device placement architecture and a rectangular, fixed-grid track system for the connecting paths. The layout process proceeds in two steps. The first step involves the use of a partial circuit graph representation to place the elements in rows, oriented in the direction of the signal flow. After iterative improvement of the placement, the second step proceeds with the routing of the connecting paths. The main problem in the automatic layout of time-of-flight circuits is achieving the correct path lengths without overlapping previously routed paths. This problem is solved by taking advantage of a certain degree of variability present in each path, allowing the use of simple heuristics to circumvent previously routed paths.

Paper Details

Date Published: 1 November 1996
PDF: 12 pages
Proc. SPIE 2848, Materials, Devices, and Systems for Optoelectronic Processing, (1 November 1996); doi: 10.1117/12.256148
Show Author Affiliations
Ruth D. Fogg, U.S. Air Force Academy (United States)


Published in SPIE Proceedings Vol. 2848:
Materials, Devices, and Systems for Optoelectronic Processing
John A. Neff; Bahram Javidi, Editor(s)

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