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Proceedings Paper

Internal sorting and FPGA
Author(s): Al Beechick; Steve Casselman; Lynn D. Yarbrough
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Paper Abstract

A new general-purpose internal sorting algorithm, called ABCsort, appears unusually well-suited for FPGA implementation. ABCsort is an O(N) algorithm (worst case, in both time and space) that is, even in software, both much faster than other internal sorts and extraordinarily flexible. ABCsort makes only read accesses to record keys, which facilitates its use in parallel on a shared-memory multiprocessor system. Although it will sort floating-point data, it requires no floating-point arithmetic; the algorithm is independent of data type except for semantics logic which is ideal for implementation in reconfigurable FPGA.

Paper Details

Date Published: 21 October 1996
PDF: 6 pages
Proc. SPIE 2914, High-Speed Computing, Digital Signal Processing, and Filtering Using Reconfigurable Logic, (21 October 1996); doi: 10.1117/12.255836
Show Author Affiliations
Al Beechick, Arrow Connection (United States)
Steve Casselman, Virtual Computer Corp. (United States)
Lynn D. Yarbrough, Mathematical and Computational Sciences (United States)


Published in SPIE Proceedings Vol. 2914:
High-Speed Computing, Digital Signal Processing, and Filtering Using Reconfigurable Logic
John Schewel; Peter M. Athanas; V. Michael Bove; John Watson, Editor(s)

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