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Proceedings Paper

Rapid prototyping of datapath intensive architectures with HML: an abstract hardware description language
Author(s): Miriam E. Leeser; Shantanu Tarafdar; Yanbing Li
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Paper Abstract

HML allows us to specify hardware at a very abstract level, and automatically generate VHDL from our specifications. The VHDL is used along with commercial CAD tools to generate field programmable logic. In this paper we present HML, a hardware description language based on SML, and discuss the translation process from HML to VHDL. As an example we use HML to specify a DTMF receiver. We present the HML for a Booth multiplier and discuss the design flow from HML to an FPGA implementation of that multiplier. HML is the only language available that applies advances in programming languages and type theory to hardware description.

Paper Details

Date Published: 21 October 1996
PDF: 12 pages
Proc. SPIE 2914, High-Speed Computing, Digital Signal Processing, and Filtering Using Reconfigurable Logic, (21 October 1996); doi: 10.1117/12.255823
Show Author Affiliations
Miriam E. Leeser, Northeastern Univ. (United States)
Shantanu Tarafdar, Northeastern Univ. (United States)
Yanbing Li, Princeton Univ. (United States)

Published in SPIE Proceedings Vol. 2914:
High-Speed Computing, Digital Signal Processing, and Filtering Using Reconfigurable Logic
John Schewel; Peter M. Athanas; V. Michael Bove; John Watson, Editor(s)

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