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Proceedings Paper

High-speed optical interconnects for parallel processing and neural networks
Author(s): Nigel Barnes; Peter Healey; Paul McKee; Alan O'Neill; Marek A. Rejman-Greene; Geoff Scott; David W. Smith; Roderick P. Webb; David Wood
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Paper Abstract

Two dimensional arrays of InGaAsIJnP based multiple quantum well surface modulators driven by standard high-speed CMOS have been demonstrated in experimental parallel optical interconnect and artificial neural processing systems. Transition times were fast enough for lOOMBit/s operation and the potential exists to increase array dimensions to include 100''s of devices and transmission rates to many GBit/s. Novel architectures employing computer generated holographic beam splitters and weight matrices outside the modulator and detector layers were employed.

Paper Details

Date Published: 1 April 1991
PDF: 7 pages
Proc. SPIE 1389, Microelectronic Interconnects and Packages: Optical and Electrical Technologies, (1 April 1991); doi: 10.1117/12.25547
Show Author Affiliations
Nigel Barnes, British Telecom Research Labs. (United Kingdom)
Peter Healey, British Telecom Research Labs. (United Kingdom)
Paul McKee, British Telecom Research Labs. (United Kingdom)
Alan O'Neill, British Telecom Research Labs. (United Kingdom)
Marek A. Rejman-Greene, British Telecom Research Labs. (United Kingdom)
Geoff Scott, British Telecom Research Labs. (United Kingdom)
David W. Smith, British Telecom Research Labs. (United Kingdom)
Roderick P. Webb, British Telecom Research Labs. (United Kingdom)
David Wood, British Telecom Research Labs. (United Kingdom)


Published in SPIE Proceedings Vol. 1389:
Microelectronic Interconnects and Packages: Optical and Electrical Technologies
Gnanalingam Arjavalingam; James Pazaris, Editor(s)

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