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Proceedings Paper

Folding large regular computational graphs onto smaller processor arrays
Author(s): Kevin J. Page; Paul M. Chau
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Paper Abstract

Index Mapping is a novel approach to mapping a class of algorithms onto linear permutation networks such as the shuffle graph. This class includes the Viterbi Algorithm, the Fast Fourier Transform, and the Bitonic Sort, among others. With this technique, it is possible to analyze a large number of possible partitioning and scheduling schemes and choose for a given technology the optimum implementation. This technique will be demonstrated by two mappings of a variable and large constraint length Viterbi decoder onto a smaller fixed interconnection processing network with minimum hardware resources. The hardware built for this mapping can calculate the Viterbi algorithm for any constraint length from 3 to 15 with programmable code polynomials and code rates from 1/2 to 1/6.

Paper Details

Date Published: 22 October 1996
PDF: 12 pages
Proc. SPIE 2846, Advanced Signal Processing Algorithms, Architectures, and Implementations VI, (22 October 1996); doi: 10.1117/12.255453
Show Author Affiliations
Kevin J. Page, Univ. of California/San Diego (United States)
Paul M. Chau, Univ. of California/San Diego (United States)


Published in SPIE Proceedings Vol. 2846:
Advanced Signal Processing Algorithms, Architectures, and Implementations VI
Franklin T. Luk, Editor(s)

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