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Proceedings Paper

Data-driven parallel architecture for syntactic pattern recognition
Author(s): Chien-Chao Tseng; Shu-Yuen Hwang
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Paper Abstract

Syntax analysis is the primary operation of a Syntactic Pattern Recognition (SPR) system. A real time SPR system would require efficient architectural supports for syntax analysis. The process of syntax analysis and the execution of a logic program are closely related. In this paper we propose a data-driven parallel architecture for syntax analysis based on the principle of parallel execution of logic programs. The proposed architecture is hybrid in the sense that its functional units unlike those itt traditional fine-grain datafiow model are coarse-grain macro operators capable of performing unification operations. The scheme for compiling the datafiow graphs eliminates the necessity of any operand matching unit in the data-driven architecture. All memory requests are tagged with register identification (similar to IBM 360/91) to provide an efficient hardware support for context switching. The experimental results indicate the proposed architecture is promising.

Paper Details

Date Published: 1 February 1991
PDF: 12 pages
Proc. SPIE 1384, High-Speed Inspection Architectures, Barcoding, and Character Recognition, (1 February 1991); doi: 10.1117/12.25326
Show Author Affiliations
Chien-Chao Tseng, National Chiao-Tung Univ. (Taiwan)
Shu-Yuen Hwang, National Chiao-Tung Univ. (Taiwan)


Published in SPIE Proceedings Vol. 1384:
High-Speed Inspection Architectures, Barcoding, and Character Recognition
Michael J. W. Chen, Editor(s)

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