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Peculiarities of selective isotropic Si etch to SiGe for nanowire and GAA transistors
Author(s): Christopher Catano; Nicholas Joy; Christopher Talone; Shyam Sridhar; Sergey Voronin; Peter Biolsi; Alok Ranjan
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Paper Abstract

Within the world of integrated circuit manufacturing there is a continuous effort to increase device density in order to improve speed, performance and costs. Current technology is driving a transition from devices that use a planar transistor to a more “3D” design, such as with nanowires or even vertically oriented transistors. The fabrication of nanowire devices demonstrates a good example of 3D etch challenges where both anisotropic and highly selective isotropic etch processes are needed. Alternating Si and SiGe layers are first etched vertically, then are later recessed selective to one another. There are a number of literature reports which have demonstrated the capability of recessing SiGe selective to Si, however the opposite is not as well established. The key challenges of this task are maximizing the selectivity to the SiGe layers as well as any other spacer and mask materials exposed on the wafer including SiO2, Si3N4, SiOCN and SiBCN. In this work, we present a study of isotropic etching for Si selective to SiGe in CF4/O2/N2 and NF3/O2/N2 based plasmas with selectivities higher than 50:1 achieved. Potential selectivity mechanisms are based on preferential oxidation of mixed SiGe layers opposed to Si, while formation of the NO molecule can result in excessive oxide layer removal from the Si surface.1,2 A qualitative model is put forth to describe the resulting etch profiles using this chemistry. Supporting data regarding F:O ratio, temperature, and Si layer thickness dependency are shown in efforts to support the model. These results will provide essential insight as the industry decides which process solution is optimal for GAA devices.

Paper Details

Date Published: 20 March 2019
PDF: 11 pages
Proc. SPIE 10963, Advanced Etch Technology for Nanopatterning VIII, 109630E (20 March 2019); doi: 10.1117/12.2514566
Show Author Affiliations
Christopher Catano, TEL Technology Ctr., America, LLC (United States)
Nicholas Joy, TEL Technology Ctr., America, LLC (United States)
Christopher Talone, TEL Technology Ctr., America, LLC (United States)
Shyam Sridhar, TEL Technology Ctr., America, LLC (United States)
Sergey Voronin, TEL Technology Ctr., America, LLC (United States)
Peter Biolsi, TEL Technology Ctr., America, LLC (United States)
Alok Ranjan, TEL Technology Ctr., America, LLC (Japan)


Published in SPIE Proceedings Vol. 10963:
Advanced Etch Technology for Nanopatterning VIII
Richard S. Wise; Catherine B. Labelle, Editor(s)

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