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Neuromorphic computing with memristors: devices and architectures (Conference Presentation)
Author(s): John Paul Strachan
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Paper Abstract

The future acceleration of many computational workloads is expected to depend on novel architectures, circuits, and devices. We describe an effort utilizing the analog and non-volatile nature of memristor crossbar arrays to accelerate matrix operations, which underpin many applications in image and signal processing, neural networks, and scientific computations. Significant performance gains and energy reductions over purely digital systems are forecasted based on our work. We describe our studies in the understanding of tantalum oxide-based memristors, integration with CMOS circuits, fine programming control over memristors, compact SPICE models of the device dynamics, and experimental implementations of matrix-heavy operations, including machine learning. We also describe applications that take advantage of the neuron-like behavior in memristor devices, in addition to the above synapse-like functions. This work begins with investigations of niobium oxide-based systems, and interesting dynamics observed based on positive feedback coupling to the electronic transport. These devices are utilized in the construction of a computing system to solve optimization problems such as the traveling salesmen problem.

Paper Details

Date Published: 8 March 2019
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Proc. SPIE 10926, Quantum Sensing and Nano Electronics and Photonics XVI, 1092603 (8 March 2019); doi: 10.1117/12.2511042
Show Author Affiliations
John Paul Strachan, Hewlett-Packard Labs. (United States)


Published in SPIE Proceedings Vol. 10926:
Quantum Sensing and Nano Electronics and Photonics XVI
Manijeh Razeghi, Editor(s)

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