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Widely parameterizable high-level synthesis
Author(s): Radoslaw Cieszewski; Krzysztof Pozniak; Ryszard Romaniuk; Maciej Linczuk
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Paper Abstract

In recent years, HLS compilers are gaining increasing popularity. This popularity is due to the fact that FPGA chips can achieve higher computing power than traditional CPUs in fine-grained algorithms. The greatest development of compilers were in recent years. Both commercial and open solutions are being developed. The most difficult part of compilers are algorithms responsible for converting code from a high high level of abstraction to low. In commercial solutions, these algorithms are closed as a "black box" and open solutions have implemented rather simple algorithms. The article presents an alternative, open solution of a high-level synthesis compiler (HLS) implemented in Python with its algorithms. The compiler, based on Python's high-level functional description, generates a configuration that allows the creation of a given structure in the FPGA system during the synthesis process. The article describes the design methods, tools and implementation of the developed Python-VHDL compiler with examples of its use.

Paper Details

Date Published: 1 October 2018
PDF: 7 pages
Proc. SPIE 10808, Photonics Applications in Astronomy, Communications, Industry, and High-Energy Physics Experiments 2018, 108084D (1 October 2018); doi: 10.1117/12.2502153
Show Author Affiliations
Radoslaw Cieszewski, Warsaw Univ. of Technology (Poland)
Krzysztof Pozniak, Warsaw Univ. of Technology (Poland)
Ryszard Romaniuk, Warsaw Univ. of Technology (Poland)
Maciej Linczuk, Warsaw Univ. of Technology (Poland)


Published in SPIE Proceedings Vol. 10808:
Photonics Applications in Astronomy, Communications, Industry, and High-Energy Physics Experiments 2018
Ryszard S. Romaniuk; Maciej Linczuk, Editor(s)

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