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Proceedings Paper

Technology of field effect transistor with DLC layer in gate area
Author(s): Piotr Firek; Aleksander Werbowy; Mateusz Śmietana
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Paper Abstract

This work presents a technology of manufacturing silicon Metal Insulator Semiconductor/Ion Sensitive Field Effect Transistors (MIS/IS FETs) with DLC (Diamond-Like Carbon) as well as SiO2/DLC thin films in the role of gate dielectric. The crucial element of fabrication process was gate dielectric layer preparation. In the first case a thin DLC film was obtained by means of Radio Frequency Plasma Assisted Chemical Vapour Deposition (RF PECVD) directly onto the Si in the transistor gate area. In the second case whereas, prior to DLC deposition, a thin silicon dioxide buffer film was grown there using the high-temperature oxidation process. The photolithography allowed to open windows for formation of electric metal (Al) contacts to transistor source and drain regions. Contacts were obtained by means of vacuum evaporation. Subsequently, transfer and output current-voltage (I-V) characteristics of so produced transistors were measured and studied.

Paper Details

Date Published: 1 October 2018
PDF: 9 pages
Proc. SPIE 10808, Photonics Applications in Astronomy, Communications, Industry, and High-Energy Physics Experiments 2018, 1080852 (1 October 2018); doi: 10.1117/12.2501537
Show Author Affiliations
Piotr Firek, Warsaw Univ. of Technology (Poland)
Aleksander Werbowy, Warsaw Univ. of Technology (Poland)
Mateusz Śmietana, Warsaw Univ. of Technology (Poland)


Published in SPIE Proceedings Vol. 10808:
Photonics Applications in Astronomy, Communications, Industry, and High-Energy Physics Experiments 2018
Ryszard S. Romaniuk; Maciej Linczuk, Editor(s)

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