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Hotspot analysis and empirical correction through mask and wafer technology harmonization
Author(s): Yohan Choi; William Chou; Jeffrey Cheng; C. H. Twu; Adder Lee; Chih Hsuan Chao; Hsin Fu Chou; Sweet Chen; James Cheng; Colbert Lu; Josh Tzeng; Jackie Cheng; Hong Jen Lee; Michael Green; Mohamed Ramadan; Young Ham; Chris Progler
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Paper Abstract

Design weak points that have narrow process window and limits wafer yield, or hotspots, continue to be a major issue in semiconductor photolithography. Resolution enhancement techniques (RET) such as advanced optical proximity correction (OPC) techniques and source mask optimization (SMO) are employed to mitigate these issues. During yield ramp for a given technology node, full-chip lithography simulation, pattern-matching and machine learning are adopted to detect and remedy the weak points from the original design [1], [2]. This is typically an iterative process by which these points are identified in short-loop lithography testing. Design retarget and/or OPC modifications are made to enhance process window until the yield goal is met. This is a high cost and time consuming process that results in a slow yield ramp for existing production nodes and increased time to market (TTM) for new node introduction. Local hotspot correction through mask and wafer harmonization is a method to enhance wafer yield with low cost and short cycle time compared to the iterative method. In this paper, a fast and low cost approach to hotspot correction is introduced. Hotspots were detected on wafer after OPC and characterized by using advanced mask characterization and optimization (AMCO) techniques. Lithographic simulations and AIMS measurement were used to verify the hotspot correction method. Finally, the validity of this new approach was evaluated by process window analysis and circuit probe yield test at wafer.

Paper Details

Date Published: 3 October 2018
PDF: 11 pages
Proc. SPIE 10810, Photomask Technology 2018, 108101K (3 October 2018); doi: 10.1117/12.2501427
Show Author Affiliations
Yohan Choi, Photronics, Inc. (United States)
William Chou, United Microelectronics Corp. (Taiwan)
Jeffrey Cheng, United Microelectronics Corp. (Taiwan)
C. H. Twu, United Microelectronics Corp. (Taiwan)
Adder Lee, United Microelectronics Corp. (Taiwan)
Chih Hsuan Chao, United Microelectronics Corp. (Taiwan)
Hsin Fu Chou, United Microelectronics Corp. (Taiwan)
Sweet Chen, United Microelectronics Corp. (Taiwan)
James Cheng, United Microelectronics Corp. (Taiwan)
Colbert Lu, Photronics DNP Semiconductor Mask Corp. (Taiwan)
Josh Tzeng, Photronics DNP Semiconductor Mask Corp. (Taiwan)
Jackie Cheng, Photronics DNP Semiconductor Mask Corp. (Taiwan)
Hong Jen Lee, Photronics DNP Semiconductor Mask Corp. (Taiwan)
Michael Green, Photronics, Inc. (United States)
Mohamed Ramadan, Photronics, Inc. (United States)
Young Ham, Photronics, Inc. (United States)
Chris Progler, Photronics, Inc. (United States)


Published in SPIE Proceedings Vol. 10810:
Photomask Technology 2018
Emily E. Gallagher; Jed H. Rankin, Editor(s)

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