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Proceedings Paper

Solving clock distribution problems in FDDI concentrators
Author(s): Gabriel M. Li
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Paper Abstract

This paper addresses the advantages of using a concentrator for inserting or removing a station onto or from the Fiber Distributed Data Interface (FDDI) ring. It gives an overview of the architecture of a FDDI concentrator. It highlights major data and clock distribution problems in a backplane bus. The main focus is a design example of a small and large concentrator using the National Semiconductor FDDI chipset. Different timing contraints such as setup and hold data and clock flight time and flight time cancellation are discussed in detail.

Paper Details

Date Published: 1 February 1991
PDF: 12 pages
Proc. SPIE 1364, FDDI, Campus-Wide, and Metropolitan Area Networks, (1 February 1991); doi: 10.1117/12.24613
Show Author Affiliations
Gabriel M. Li, National Semiconductor Corp. (United States)


Published in SPIE Proceedings Vol. 1364:
FDDI, Campus-Wide, and Metropolitan Area Networks
Kadiresan Annamalai; Stewart K. Cudworth; Allen B. Kasiewicz, Editor(s)

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