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Proceedings Paper

PtSi FPA with improved CSD operation
Author(s): Tadashi Shiraishi; Hirofumi Yagi; Kazuyo Endo; Masafumi Kimata; Tatsuo Ozeki; Keisuke Kama; Toshiki Seto
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Paper Abstract

Over the past ten years we have been developing PtSi focal plane arrays (FPAs) using the charge sweep device (CSD). FPAs are going to high resolution and the power of the FPAs are on an upward trend. Now we have developed a low-power CMOS CSD scanner (LOCCS) for a high resolution FPA. The conventional CSD scanner operates at the same frequency as that of the horizontal CCD to prevent fixed pattern noise (FPN), and generates a frequency pulse higher than the minimum requirement. The LOCCS is a kind of CMOS dynamic shift resistor, which generates clock pulses for vertical signal transfer without the low frequency input pulses that cause FPN. Because the LOCCS generates multi-phase clock pulses, the power consumption can be reduced. We have fabricated test devices to evaluate the improved CSD operation by the LOCCS, and confirmed that the devices operate normally and the reduction of power consumption is in good agreement with the theory. We also applied the LOCCS to a 256 by 256 PtSi FPA and obtained thermal images.

Paper Details

Date Published: 27 June 1996
PDF: 11 pages
Proc. SPIE 2744, Infrared Technology and Applications XXII, (27 June 1996); doi: 10.1117/12.243489
Show Author Affiliations
Tadashi Shiraishi, Mitsubishi Electric Corp. (Japan)
Hirofumi Yagi, Mitsubishi Electric Corp. (Japan)
Kazuyo Endo, Mitsubishi Electric Corp. (Japan)
Masafumi Kimata, Mitsubishi Electric Corp. (Japan)
Tatsuo Ozeki, Mitsubishi Electric Corp. (Japan)
Keisuke Kama, Mitsubishi Electric Corp. (Japan)
Toshiki Seto, Mitsubishi Electric Corp. (Japan)

Published in SPIE Proceedings Vol. 2744:
Infrared Technology and Applications XXII
Bjorn F. Andresen; Marija S. Scholl, Editor(s)

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