Proceedings PaperPatterning ULSI circuits
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The traditional scaling of feature sized to ever smaller dimensions which has driven the semiconductor industry for 30 years is being challenged by physical and cost limits. As we approach the development of the 180-nm generation, we have a quite different technology scenario facing us than we have seen in the past. The approaches being contemplated can be summarized in order of utility as (1) extensions of existing patterning methods, (2) nonlithography patterning approaches, (3) extensions of the optical projection/reduction approach, (4) new beam techniques, and (5) probe techniques. I will review the challenges in each of these categories and indicate where serious development efforts are needed to sustain technology scaling into the ULSI generations.