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Proceedings Paper

SMESH: an IO-computation balanced architecture for parallel implementations of convolution and morphological filters in real time
Author(s): Tri CaoHuu; Cao-Huu Tuan
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Paper Abstract

A high-speed special purpose architecture is presented to implement convolution and morphological filters in real-time. The highly parallel pipelined architecture developed has the characteristics of both a systolic array and an augmented 2-D mesh connected computers. We refer to this hybrid architecture as a systolic mesh (SMESH). In contrast to previous work in this area which has the emphasized the computational aspects the SMESH architecture addresses both computation and TO issues. We exploit the systolic array approach to improve the computation execution time while using a special broadcast scheme to speed-up JO communication leading to an 10-computation balanced design. I.

Paper Details

Date Published: 1 November 1990
PDF: 15 pages
Proc. SPIE 1350, Image Algebra and Morphological Image Processing, (1 November 1990); doi: 10.1117/12.23602
Show Author Affiliations
Tri CaoHuu, Texas A&M Univ. (United States)
Cao-Huu Tuan, Concordia Univ. (United States)


Published in SPIE Proceedings Vol. 1350:
Image Algebra and Morphological Image Processing
Paul D. Gader, Editor(s)

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