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Proceedings Paper

Design of a Gaussian elimination architecture for the DOC II processor
Author(s): Miles Murdocca
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Paper Abstract

The OptiComp DOC II processor serves as the basis for the design of a hybrid optical/electronic architecture that solves systems of linear equations using Gaussian elimination. The architecture consists of a cascade of acoustooptic modulator based programmable logic arrays (PLAs) operating at a rate of 100MHz. Arithmetic operations are performed using 16-bit fixed point arithmetic, and include subtraction, multiplication and division. The design goal is to solve a system of linear equations in 10 unknowns in under 20 µs, for a target application of null steering for phased array radar. The design goal is achieved with reasonable complexity.

Paper Details

Date Published: 1 December 1991
Proc. SPIE 1563, Optical Enhancements to Computing Technology, (1 December 1991); doi: 10.1117/12.2321740
Show Author Affiliations
Miles Murdocca, Rutgers Univ. (United States)

Published in SPIE Proceedings Vol. 1563:
Optical Enhancements to Computing Technology
John A. Neff, Editor(s)

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