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Indium bump deposition for flip-chip micro-array image sensing and display applications
Author(s): Alexander Manasson; Mohamed A. Bah; Brian Desmarais; David Douglass; Craig Outten; Joshua Schumacher; Matthew Robinson; Chen Zhang
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Paper Abstract

Solder bump array formation is a key step in micro-array flip-chip fabrication process. Fabrication of solder bumps with small diameter and high aspect ratio geometries is necessary for high pixel density and low noise detectors. Indium is an attractive material for low temperature sensing application due to its cryogenic stability, good thermal and electrical conductivity, and ductile nature. In this paper, fill quality of micro-patterned arrays with thermally evaporated indium thin film is studied. Impact of indium evaporation rate, substrate temperature, bump aspect ratio and bump array pitch on bump formation in the via trenches is investigated. The indium bump formation dynamics are discussed in detail. State-of-art indium bump size with high aspect ratio and small array pitch is achieved, along with high uniformity and low defect density.

Paper Details

Date Published: 8 May 2018
PDF: 13 pages
Proc. SPIE 10639, Micro- and Nanotechnology Sensors, Systems, and Applications X, 106392I (8 May 2018); doi: 10.1117/12.2303735
Show Author Affiliations
Alexander Manasson, Denton Vacuum, LLC (United States)
Mohamed A. Bah, Denton Vacuum, LLC (United States)
Brian Desmarais, Denton Vacuum, LLC (United States)
David Douglass, Denton Vacuum, LLC (United States)
Craig Outten, Denton Vacuum, LLC (United States)
Joshua Schumacher, National Institute of Standards and Technology (United States)
Matthew Robinson, National Institute of Standards and Technology (United States)
Chen Zhang, National Institute of Standards and Technology (United States)


Published in SPIE Proceedings Vol. 10639:
Micro- and Nanotechnology Sensors, Systems, and Applications X
Thomas George; Achyut K. Dutta; M. Saif Islam, Editor(s)

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