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Proceedings Paper

Packaging of electronics for on- and off-FPA signal processing
Author(s): Stuart N. Shanken
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Paper Abstract

The process for manufacturing parallel processors using Z-plane technology is described along with the interconnectivity achievable for parallel processors. A thermal analysis performed on a typical module using the NASA SINDA model is shown. The Z-plane packaging technology producibility and reworkability are addressed.

Paper Details

Date Published: 1 November 1990
PDF: 5 pages
Proc. SPIE 1339, Materials, Devices, Techniques, and Applications for Z-Plane Focal Plane Array Technology II, (1 November 1990); doi: 10.1117/12.23018
Show Author Affiliations
Stuart N. Shanken, Irvine Sensors Corp. (United States)


Published in SPIE Proceedings Vol. 1339:
Materials, Devices, Techniques, and Applications for Z-Plane Focal Plane Array Technology II
John C. Carson, Editor(s)

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