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Proceedings Paper

Low-power analog-to-digital converter
Author(s): Paul Ernest Green
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Paper Abstract

This paper describes the design and testing of a low power Analog to Digital converter. In the design of Z-Plane focal plane array technology the consumption of power by circuitry in the signal processing electronics, that are part of the Z-Plane, is a primary limiting factor in the overall Z-Plane system signal processing architecture. The Analog to Digital converter was designed by applying charge-coupled device (CCD) technology to the binary weighing problem. The Analog to Digital converter is, with the exception of the comparator, an all digital CMOS design. The design concepts are discussed along with preliminary test results.

Paper Details

Date Published: 1 November 1990
PDF: 9 pages
Proc. SPIE 1339, Materials, Devices, Techniques, and Applications for Z-Plane Focal Plane Array Technology II, (1 November 1990); doi: 10.1117/12.23013
Show Author Affiliations
Paul Ernest Green, Rockwell International Corp. (United States)


Published in SPIE Proceedings Vol. 1339:
Materials, Devices, Techniques, and Applications for Z-Plane Focal Plane Array Technology II
John C. Carson, Editor(s)

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