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Proceedings Paper

Process control technology for nanoimprint lithography
Author(s): Hirotaka Tsuda; Hirokazu Washida; Motofumi Komori; Takuya Kono; Tetsuro Nakasugi; Wooyung Jung
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Paper Abstract

Nanoimprint lithography (NIL) is regarded as one of the candidates for next generation lithography toward singlenanometer manufacturing. Among the wide variety of imprint methods, Jet and Flash Imprint Lithography (J-FIL) process is the most suitable for IC manufacturing for which high productivity and high precision is required. Unlike spin-coating-based NIL process J-FIL process has some capabilities to solve the issue by controlling local resist volume based on pattern design of the patterned mask (template). In order to improve NIL process, in this paper we focus on understanding the occurrence of non-filling defects during resist filling into the template features, and propose the new optimization concept of drop amount and drop arrangement for fast filling and defect reduction.

Paper Details

Date Published: 23 March 2018
PDF: 6 pages
Proc. SPIE 10584, Novel Patterning Technologies 2018, 105841D (23 March 2018); doi: 10.1117/12.2297332
Show Author Affiliations
Hirotaka Tsuda, Toshiba Memory Corp. (Japan)
Hirokazu Washida, Toshiba Memory Corp. (Japan)
Motofumi Komori, Toshiba Memory Corp. (Japan)
Takuya Kono, Toshiba Memory Corp. (Japan)
Tetsuro Nakasugi, Toshiba Memory Corp. (Japan)
Wooyung Jung, SK Hynix, Inc. (Korea, Republic of)


Published in SPIE Proceedings Vol. 10584:
Novel Patterning Technologies 2018
Eric M. Panning, Editor(s)

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