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Unbiased roughness measurements: the key to better etch performance
Author(s): Andrew Liang; Chris Mack; Stephen Sirard; Chen-wei Liang; Liu Yang; Justin Jiang; Nader Shamma; Rich Wise; Jengyi Yu; Diane Hymes
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Paper Abstract

Edge placement error (EPE) has become an increasingly critical metric to enable Moore’s Law scaling. Stochastic variations, as characterized for lines by line width roughness (LWR) and line edge roughness (LER), are dominant factors in EPE and known to increase with the introduction of EUV lithography. However, despite recommendations from ITRS, NIST, and SEMI standards, the industry has not agreed upon a methodology to quantify these properties. Thus, differing methodologies applied to the same image often result in different roughness measurements and conclusions. To standardize LWR and LER measurements, Fractilia has developed an unbiased measurement that uses a raw unfiltered line scan to subtract out image noise and distortions. By using Fractilia’s inverse linescan model (FILM) to guide development, we will highlight the key influences of roughness metrology on plasma-based resist smoothing processes. Test wafers were deposited to represent a 5 nm node EUV logic stack. The patterning stack consists of a core Si target layer with spin-on carbon (SOC) as the hardmask and spin-on glass (SOG) as the cap. Next, these wafers were exposed through an ASML NXE 3350B EUV scanner with an advanced chemically amplified resist (CAR). Afterwards, these wafers were etched through a variety of plasma-based resist smoothing techniques using a Lam Kiyo conductor etch system. Dense line and space patterns on the etched samples were imaged through advanced Hitachi CDSEMs and the LER and LWR were measured through both Fractilia and an industry standard roughness measurement software. By employing Fractilia to guide plasma-based etch development, we demonstrate that Fractilia produces accurate roughness measurements on resist in contrast to an industry standard measurement software. These results highlight the importance of subtracting out SEM image noise to obtain quicker developmental cycle times and lower target layer roughness.

Paper Details

Date Published: 13 March 2018
PDF: 9 pages
Proc. SPIE 10585, Metrology, Inspection, and Process Control for Microlithography XXXII, 1058524 (13 March 2018); doi: 10.1117/12.2297328
Show Author Affiliations
Andrew Liang, Lam Research Corp. (United States)
Chris Mack, Fractilia, LLC (United States)
Stephen Sirard, Lam Research Corp. (United States)
Chen-wei Liang, Lam Research Corp. (United States)
Liu Yang, Lam Research Corp. (United States)
Justin Jiang, Lam Research Corp. (United States)
Nader Shamma, Lam Research Corp. (United States)
Rich Wise, Lam Research Corp. (United States)
Jengyi Yu, Lam Research Corp. (United States)
Diane Hymes, Lam Research Corp. (United States)

Published in SPIE Proceedings Vol. 10585:
Metrology, Inspection, and Process Control for Microlithography XXXII
Vladimir A. Ukraintsev, Editor(s)

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