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Proceedings Paper

Holistic metrology qualification extension and its application to characterize overlay targets with asymmetric effects
Author(s): Olavio Dos Santos Ferreira; Reza Sadat Gousheh; Bart Visser; Kenrick Lie; Rachel Teuwen; Pavel Izikson; Grzegorz Grzela; Babak Mokaberi; Steve Zhou; Justin Smith; Danish Husain; Ram S. Mandoy; Raul Olvera
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Paper Abstract

Ever increasing need for tighter on-product overlay (OPO), as well as enhanced accuracy in overlay metrology and methodology, is driving semiconductor industry’s technologists to innovate new approaches to OPO measurements. In case of High Volume Manufacturing (HVM) fabs, it is often critical to strive for both accuracy and robustness. Robustness, in particular, can be challenging in metrology since overlay targets can be impacted by proximity of other structures next to the overlay target (asymmetric effects), as well as symmetric stack changes such as photoresist height variations. Both symmetric and asymmetric contributors have impact on robustness. Furthermore, tweaking or optimizing wafer processing parameters for maximum yield may have an adverse effect on physical target integrity. As a result, measuring and monitoring physical changes or process abnormalities/artefacts in terms of new Key Performance Indicators (KPIs) is crucial for the end goal of minimizing true in-die overlay of the integrated circuits (ICs). IC manufacturing fabs often relied on CD-SEM in the past to capture true in-die overlay. Due to destructive and intrusive nature of CD-SEMs on certain materials, it’s desirable to characterize asymmetry effects for overlay targets via inline KPIs utilizing YieldStar (YS) metrology tools. These KPIs can also be integrated as part of (μDBO) target evaluation and selection for final recipe flow. In this publication, the Holistic Metrology Qualification (HMQ) flow was extended to account for process induced (asymmetric) effects such as Grating Imbalance (GI) and Bottom Grating Asymmetry (BGA). Local GI typically contributes to the intrafield OPO whereas BGA typically impacts the interfield OPO, predominantly at the wafer edge. Stack height variations highly impact overlay metrology accuracy, in particular in case of multi-layer LithoEtch Litho-Etch (LELE) overlay control scheme. Introducing a GI impact on overlay (in nm) KPI check quantifies the grating imbalance impact on overlay, whereas optimizing for accuracy using self-reference captures the bottom grating asymmetry effect. Measuring BGA after each process step before exposure of the top grating helps to identify which specific step introduces the asymmetry in the bottom grating. By evaluating this set of KPI's to a BEOL LELE overlay scheme, we can enhance robustness of recipe selection and target selection. Furthermore, these KPIs can be utilized to highlight process and equipment abnormalities. In this work, we also quantified OPO results with a self-contained methodology called Triangle Method. This method can be utilized for LELE layers with a common target and reference. This allows validating general μDBO accuracy, hence reducing the need for CD-SEM verification.

Paper Details

Date Published: 13 March 2018
PDF: 14 pages
Proc. SPIE 10585, Metrology, Inspection, and Process Control for Microlithography XXXII, 105850T (13 March 2018); doi: 10.1117/12.2297184
Show Author Affiliations
Olavio Dos Santos Ferreira, ASML Netherlands B.V. (Netherlands)
Reza Sadat Gousheh, ASML (United States)
Bart Visser, ASML Netherlands B.V. (Netherlands)
Kenrick Lie, ASML Netherlands B.V. (Netherlands)
Rachel Teuwen, ASML Netherlands B.V. (Netherlands)
Pavel Izikson, ASML Netherlands B.V. (Netherlands)
Grzegorz Grzela, ASML Netherlands B.V. (Netherlands)
Babak Mokaberi, SAMSUNG Austin Semiconductor LLC (United States)
Steve Zhou, SAMSUNG Austin Semiconductor LLC (United States)
Justin Smith, SAMSUNG Austin Semiconductor LLC (United States)
Danish Husain, SAMSUNG Austin Semiconductor LLC (United States)
Ram S. Mandoy, SAMSUNG Austin Semiconductor LLC (United States)
Raul Olvera, SAMSUNG Austin Semiconductor LLC (United States)


Published in SPIE Proceedings Vol. 10585:
Metrology, Inspection, and Process Control for Microlithography XXXII
Vladimir A. Ukraintsev, Editor(s)

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