Share Email Print

Proceedings Paper

Nanoscale vacuum electronics and large-scale silicon nanowire array fabrication for various applications (Conference Presentation)
Author(s): Meyya Meyyappan
cover GOOD NEWS! Your organization subscribes to the SPIE Digital Library. You may be able to download this paper for free. Check Access

Paper Abstract

While conventional CMOS scaling has not quit yet, alternatives have been continuously investigated for a wide range of applications. We have been fabricating nanoscale vacuum tubes using entirely and exclusively silicon technology. Vacuum is superior to any semiconductor in terms of electron transport, in addition to being immune to all radiations. We have combined the best of vacuum and silicon technology to fabricate surround gate nanoscale vacuum transistors on 8 " wafers with a channel dimension of 50 nm. These vacuum transistors, operating at a drive voltage of only 2 V, which is remarkable for vacuum devices, have the potential for THz electronics and several other applications. While silicon nanowires have been found to be ideal for a range of applications, the bottom up nanotechnology efforts to date have hindered progress in terms of large scale fabrication. We have developed top down approaches to create silicon nanowires on 8 " wafers and demonstrated their superior performance in BioFETs (field effect transistors) for biosensing, photodetecors and solar cells. This talk will present results to date for these applications. The author thanks Jin-Woo Han, Chang-ki Baek, Kihyun Kim and Taiuk Rim for their contributions.

Paper Details

Date Published: 14 March 2018
Proc. SPIE 10540, Quantum Sensing and Nano Electronics and Photonics XV, 1054008 (14 March 2018); doi: 10.1117/12.2297140
Show Author Affiliations
Meyya Meyyappan, NASA Ames Research Ctr. (United States)

Published in SPIE Proceedings Vol. 10540:
Quantum Sensing and Nano Electronics and Photonics XV
Manijeh Razeghi; Gail J. Brown; Jay S. Lewis; Giuseppe Leo, Editor(s)

© SPIE. Terms of Use
Back to Top