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Proceedings Paper

Novel architecture for data management and control for small satellite
Author(s): Giorgio Adami; D. Fossati; M. Turri
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Paper Abstract

The paper introduces an innovative architecture for the on-board units that are responsible to provide the data interface, control and processing capability normally allocated in separated electronics boxes in the data handling subsystem of the space system. A new solution for the attitude control of the space vehicle has been studied and developed and the utilization of this technological growth, in particular that concerns the GPS receiver, is matter for novel architecture. This new approach also involves in general the small satellite ground segment product as matter of a dedicated development approach. Small and medium satellites are considered an attractive solution for the low cost scientific experimentation, communication or remote sensing satellites. The functional and performance capability of the studied on-board units and ground segment are assessed in tight conjunction with the evolution of the European and the USA market. The design of these units has to be based on few and simple driving requirements, directly derived from the new modified scenario: (1) The limited budgets available for space system. (2) The quick mission data return, i.e., low development time by specific and tailored system development tools. The quick availability of data to scientists/user is requested without jeopardizing the maximum and guaranteed scientific or commercial return. The proposed system is then given thinking to an architecture based on a high degree of modularity (and reuse of existing library of modules) thus allowing to keep down costs and to speed up the time to market. The design ground rules are so established in order to cope with the following performance: (1) capability to adapt with few impacts the system interfaces, in particular for attitude sensors and actuators that are tightly mission dependent; (2) easy adaptation of on board computational performances and memory capacity (including mass memory storage capability); (3) definition of a hierarchical and modular software design for the same rationale explained for the hardware.

Paper Details

Date Published: 15 December 1995
PDF: 11 pages
Proc. SPIE 2583, Advanced and Next-Generation Satellites, (15 December 1995); doi: 10.1117/12.228598
Show Author Affiliations
Giorgio Adami, Laben SpA (Italy)
D. Fossati, Laben SpA (Italy)
M. Turri, Laben SpA (Italy)


Published in SPIE Proceedings Vol. 2583:
Advanced and Next-Generation Satellites
Hiroyuki Fujisada; Martin N. Sweeting, Editor(s)

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