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Proceedings Paper

Multi-resolution CMOS image sensor
Author(s): Faycal Saffih
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Paper Abstract

The present paper proposes a new approach for the implementation of a multiresolution CMOS image sensor at the pixel level, in contrast to the previously reported column- and chip-level integrations Ell, [2] The new approach is realized through the implementation of multiresolution acquisition scheme with a new pixel building block in order to sample any arbitrary multiresolution pattern with multiple fields of view. The programmability, expandability and low power properties are the most important features characterizing our new suggested acquisition scheme. Thus, it forges the way for a broad spectrum of applications, from web cameras and videophone to industrial inspection and multi-objects tracking. The new architecture has been implemented on a 64x64 pixel image sensor using 0.18iim standard salicide CMOS technology with six metals and one poly silicon layer occupying 3.5x3.5mm2. The chip is currently under test.

Paper Details

Date Published: 29 August 2017
PDF: 4 pages
Proc. SPIE 10313, Opto-Canada: SPIE Regional Meeting on Optoelectronics, Photonics, and Imaging, 1031348 (29 August 2017); doi: 10.1117/12.2283948
Show Author Affiliations
Faycal Saffih, Univ. of Waterloo (Canada)

Published in SPIE Proceedings Vol. 10313:
Opto-Canada: SPIE Regional Meeting on Optoelectronics, Photonics, and Imaging
John C. Armitage, Editor(s)

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