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Overview of several applications of chemical downstream etching (CDE) for IC manufacturing: advantages and drawbacks versus WET processes
Author(s): Côme de Buttet; Emilie Prevost; Alain Campo; Philippe Garnier; Stephane Zoll; Laurent Vallier; Gilles Cunge; Patrick Maury; Thomas Massin; Sonarith Chhun
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Paper Abstract

Today the IC manufacturing faces lots of problematics linked to the continuous down scaling of printed structures. Some of those issues are related to wet processing, which are often used in the IC manufacturing flow for wafer cleaning, material etching and surface preparation. In the current work we summarize the limitations for the next nodes of wet processing such as metallic contaminations, wafer charging, corrosion and pattern collapse. As a replacement, we promoted the isotropic chemical dry etching (CDE) which is supposed to fix all the above drawbacks. Etching steps of SI3N4 layers were evaluated in order to prove the interest of such technique.

Paper Details

Date Published: 21 March 2017
PDF: 13 pages
Proc. SPIE 10149, Advanced Etch Technology for Nanopatterning VI, 101490L (21 March 2017); doi: 10.1117/12.2257971
Show Author Affiliations
Côme de Buttet, CEA-LETI (France)
STMicroelectronics (France)
Emilie Prevost, STMicroelectronics (France)
Alain Campo, CEA-LETI (France)
Philippe Garnier, STMicroelectronics (France)
Stephane Zoll, STMicroelectronics (France)
Laurent Vallier, LTM CNRS, UJF (France)
Gilles Cunge, LTM CNRS, UJF (France)
Patrick Maury, STMicroelectronics (France)
Thomas Massin, STMicroelectronics (France)
Sonarith Chhun, STMicroelectronics (France)


Published in SPIE Proceedings Vol. 10149:
Advanced Etch Technology for Nanopatterning VI
Sebastian U. Engelmann, Editor(s)

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