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Proceedings Paper

Study of selective chemical downstream plasma etching of silicon nitride and silicon oxide for advanced patterning applications
Author(s): Emilie Prévost; Gilles Cunge; Côme De-Buttet; Sebastien Lagrasta; Laurent Vallier; Camille Petit-Etienne
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Paper Abstract

The evolution of integrated components in the semiconductors industry is nowadays looking for ultra-high selective etching processes in order to etch high aspect ratio structures in complicated stacks of ultrathin layers. For ultra-high selective processes, typical plasma etching show limitations, while wet etching processes reach limitations due to capillary forces. For these reasons there is a great regain of interest today in chemical downstream etching systems (CDE), which combine the advantages of plasma and wet treatments. The absence of photons and ions allow to minimize damages and to achieve very high selectivity (in isotropic etching). In this work we investigated the parameters enabling to etch selectively the Si3N4 to the SiO2 by CDE. We shown that the correlation between the gas mixture and the wafer temperature is the key to obtain the desired selectivity. In order to optimize the processing window, the mixture composition (NF3/N2/O2/He) and the temperatures were screened by several DOE (Designs Of Experiments). Conditions are found in which the etching selectivity between the two silicon alloys is higher than 100, which allowed us to clean out sacrificial Si3N4 layers in very high aspect ratio (about 100) silicon trenches of nanometric size (60nm) without damaging the 10nm thin SiO2 caping layer (between the Si and the Si3N4). This demonstrates that downstream plasma etching can perform better than wet treatments in this case.

Paper Details

Date Published: 21 March 2017
PDF: 11 pages
Proc. SPIE 10149, Advanced Etch Technology for Nanopatterning VI, 101490M (21 March 2017); doi: 10.1117/12.2257927
Show Author Affiliations
Emilie Prévost, STMicroelectronics, Lab. des Technologie de la Microelectronique (France)
Gilles Cunge, Lab. des Technologies de La Microelectronique (France)
Côme De-Buttet, STMicroelectronics (France)
Sebastien Lagrasta, STMicroelectronics (France)
Laurent Vallier, Lab. des Technologies de La Microelectronique (France)
Camille Petit-Etienne, Lab. des Technologies de La Microelectronique (France)


Published in SPIE Proceedings Vol. 10149:
Advanced Etch Technology for Nanopatterning VI
Sebastian U. Engelmann, Editor(s)

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