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Proceedings Paper

CMOS patterning over high-aspect ratio topographies for N10/N7 using spin-on carbon hardmasks
Author(s): Toby Hopf; Monique Ercken; Geert Mannaert; Eddy Kunnen; Zheng Tao; Nadia Vandenbroeck; Farid Sebaai; Yoshiaki Kikuchi; Hans Mertens; Stefan Kubicek; Steven Demuynck; Naoto Horiguchi
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Paper Abstract

In this paper proof-of-principle demonstrations of spin-on carbon (SOC)/spin-on glass (SOG)-based lithography processes which could replace standard patterning stacks within the FEOL for upcoming advanced nodes like N10/N7 are presented. At these dimensions the standard lithography approaches that have been utilized within the previous nodes will begin to run into fundamental limitations as a result of the extremely high aspect ratios of the device topography, requiring both new materials as well as new patterning flows in order to allow for continued device scaling. Here, novel SOC/SOG-based patterning flows have been demonstrated which could be applied to implement Source Drain Extension implantations and epitaxial growth processes for CMOS FinFET device architectures even down at N10/N7 dimensions.

Paper Details

Date Published: 27 March 2017
PDF: 7 pages
Proc. SPIE 10146, Advances in Patterning Materials and Processes XXXIV, 1014618 (27 March 2017); doi: 10.1117/12.2257668
Show Author Affiliations
Toby Hopf, IMEC (Belgium)
Monique Ercken, IMEC (Belgium)
Geert Mannaert, IMEC (Belgium)
Eddy Kunnen, IMEC (Belgium)
Zheng Tao, IMEC (Belgium)
Nadia Vandenbroeck, IMEC (Belgium)
Farid Sebaai, IMEC (Belgium)
Yoshiaki Kikuchi, IMEC (Belgium)
Hans Mertens, IMEC (Belgium)
Stefan Kubicek, IMEC (Belgium)
Steven Demuynck, IMEC (Belgium)
Naoto Horiguchi, IMEC (Belgium)


Published in SPIE Proceedings Vol. 10146:
Advances in Patterning Materials and Processes XXXIV
Christoph K. Hohle, Editor(s)

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