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Proceedings Paper

New trends in logic synthesis for both digital designing and data processing
Author(s): Grzegorz Borowik; Tadeusz Łuba; Krzysztof Poźniak
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Paper Abstract

FPGA devices are equipped with memory-based structures. These memories act as very large logic cells where the number of inputs equals the number of address lines. At the same time, there is a huge demand in the market of Internet of Things for devices implementing virtual routers, intrusion detection systems, etc.; where such memories are crucial for realizing pattern matching circuits, IP address tables, and other. Unfortunately, existing CAD tools are not well suited to utilize capabilities that such large memory blocks offer due to the lack of appropriate synthesis procedures. This paper presents methods which are useful for memory-based implementations: minimization of the number of input variables and functional decomposition.

Paper Details

Date Published: 28 September 2016
PDF: 11 pages
Proc. SPIE 10031, Photonics Applications in Astronomy, Communications, Industry, and High-Energy Physics Experiments 2016, 100314U (28 September 2016); doi: 10.1117/12.2249240
Show Author Affiliations
Grzegorz Borowik, Warsaw Univ. of Technology (Poland)
Auckland Univ. of Technology (Australia)
Tadeusz Łuba, Warsaw Univ. of Technology (Poland)
Krzysztof Poźniak, Warsaw Univ. of Technology (Poland)


Published in SPIE Proceedings Vol. 10031:
Photonics Applications in Astronomy, Communications, Industry, and High-Energy Physics Experiments 2016
Ryszard S. Romaniuk, Editor(s)

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