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Proceedings Paper

FPGA-based real-time phase measuring profilometry algorithm design and implementation
Author(s): Guomin Zhan; Hongwei Tang; Kai Zhong; Zhongwei Li; Yusheng Shi
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Paper Abstract

Phase measuring profilometry (PMP) has been widely used in many fields, like Computer Aided Verification (CAV), Flexible Manufacturing System (FMS) et al. High frame-rate (HFR) real-time vision-based feedback control will be a common demands in near future. However, the instruction time delay in the computer caused by numerous repetitive operations greatly limit the efficiency of data processing. FPGA has the advantages of pipeline architecture and parallel execution, and it fit for handling PMP algorithm. In this paper, we design a fully pipelined hardware architecture for PMP. The functions of hardware architecture includes rectification, phase calculation, phase shifting, and stereo matching. The experiment verified the performance of this method, and the factors that may influence the computation accuracy was analyzed.

Paper Details

Date Published: 13 November 2016
PDF: 11 pages
Proc. SPIE 10023, Optical Metrology and Inspection for Industrial Applications IV, 1002304 (13 November 2016); doi: 10.1117/12.2245375
Show Author Affiliations
Guomin Zhan, Huazhong Univ. of Science and Technology (China)
Hongwei Tang, Huazhong Univ. of Science and Technology (China)
Kai Zhong, Huazhong Univ. of Science and Technology (China)
Zhongwei Li, Huazhong Univ. of Science and Technology (China)
Yusheng Shi, Huazhong Univ. of Science and Technology (China)


Published in SPIE Proceedings Vol. 10023:
Optical Metrology and Inspection for Industrial Applications IV
Sen Han; Toru Yoshizawa; Song Zhang, Editor(s)

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