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Proceedings Paper

Evaluating system for SRAM-based FPGA single event upset rate
Author(s): Yunlong Wang; Bin Bao
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Paper Abstract

This paper takes static random-access-memory (SRAM)-based field-programmable-gate-array (FPGA) as the research object. Attention is focused on the configuration memory of this kind of FPGA, and the research has been devoted to the contents of the configuration memory and the configuration circuit to manage its contents. The single event upset (SEU) happening in the configuration memory doesn’t lead to a functional failure necessarily. The dynamic SEU is SEU which happens in the configuration memory and causes necessarily function failure. This paper introduces a test method of dynamic SUE rate for the SRAM-based FPGA by designing a FPGA with self-test function.

Paper Details

Date Published: 27 September 2016
PDF: 5 pages
Proc. SPIE 9684, 8th International Symposium on Advanced Optical Manufacturing and Testing Technologies: Optical Test, Measurement Technology, and Equipment, 968423 (27 September 2016); doi: 10.1117/12.2243428
Show Author Affiliations
Yunlong Wang, Beijing Institute of Space Mechanics and Electricity (China)
Bin Bao, Beijing Institute of Space Mechanics and Electricity (China)


Published in SPIE Proceedings Vol. 9684:
8th International Symposium on Advanced Optical Manufacturing and Testing Technologies: Optical Test, Measurement Technology, and Equipment
Yudong Zhang; Fan Wu; Ming Xu; Sandy To, Editor(s)

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