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Proceedings Paper

Design and simulation of silicon photonic schematics and layouts
Author(s): Lukas Chrostowski; Zeqin Lu; Jonas Flueckiger; Xu Wang; Jackson Klein; Amy Liu; Jaspreet Jhoja; James Pond
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Paper Abstract

Electronic circuit designers commonly start their design process with a schematic, namely an abstract representation of the physical circuit. In integrated photonics on the other hand, it is common for the design to begin at the physical component level, and create a layout by connecting components with interconnects. In this paper, we discuss how to create a schematic from the physical layout via netlist extraction, which enables circuit simulations. Post-layout extraction can also be used to predict how fabrication variability and non-uniformity will impact circuit performance. This is based on the component position information, compact models that are parameterized for dimensional variations, and manufacturing variability models such as a simulated wafer thickness map. This final step is critical in understanding how real-world silicon photonic circuits will behave. We present an example based on treating the ring resonator as a circuit. A silicon photonics design kit, as described here, is available for download at

Paper Details

Date Published: 13 May 2016
PDF: 11 pages
Proc. SPIE 9891, Silicon Photonics and Photonic Integrated Circuits V, 989114 (13 May 2016); doi: 10.1117/12.2230376
Show Author Affiliations
Lukas Chrostowski, The Univ. of British Columbia (Canada)
Zeqin Lu, The Univ. of British Columbia (Canada)
Jonas Flueckiger, The Univ. of British Columbia (Canada)
Xu Wang, Lumerical Solutions, Inc. (Canada)
Jackson Klein, Lumerical Solutions, Inc. (Canada)
Amy Liu, Lumerical Solutions, Inc. (Canada)
Jaspreet Jhoja, Lumerical Solutions, Inc. (Canada)
James Pond, Lumerical Solutions, Inc. (Canada)

Published in SPIE Proceedings Vol. 9891:
Silicon Photonics and Photonic Integrated Circuits V
Laurent Vivien; Lorenzo Pavesi; Stefano Pelli, Editor(s)

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