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Proceedings Paper

Method of glitch reduction in DAC with weight redundancy
Author(s): Olexiy D. Azarov; Olexander G. Murashchenko; Olexander I. Chernyak; Andrzej Smolarz; Gulzhan Kashaganova
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Paper Abstract

The appearance of glitches in digital-to-analog converters leads to significant limitations of conversion accuracy and speed, which is critical for DAC and limits their usage. This paper researches the possibility of using the redundant positional number system in order to reduce glitches in DAC. There had been described the usage pattern of number systems with fractional digit weights of bits as well as with the whole number weights of bits. Hereafter there had been suggested the algorithm for glitches reduction in the DAC generation mode of incessant analogue signal. There had also been estimated the efficiency of weight redundancy application with further presentation of the most efficient parameters of number systems. The paper describes a block diagram of a low-glitch DAC based on Fibonacci codes. The simulation results prove the feasibility of weight redundancy application and show a significant reduction of glitches in DAC in comparison with the classical binary system.

Paper Details

Date Published: 17 December 2015
PDF: 8 pages
Proc. SPIE 9816, Optical Fibers and Their Applications 2015, 98161T (17 December 2015); doi: 10.1117/12.2229045
Show Author Affiliations
Olexiy D. Azarov, Vinnytsia National Technical Univ. (Ukraine)
Olexander G. Murashchenko, Vinnytsia National Technical Univ. (Ukraine)
Olexander I. Chernyak, Vinnytsia National Technical Univ. (Ukraine)
Andrzej Smolarz, Lublin Univ. of Technology (Poland)
Gulzhan Kashaganova, Kazakh National Research Technical Univ. (Kazakhstan)

Published in SPIE Proceedings Vol. 9816:
Optical Fibers and Their Applications 2015
Ryszard S. Romaniuk; Waldemar Wojcik; Andrzej Smolarz, Editor(s)

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