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Proceedings Paper

Wafer hotspot prevention using etch aware OPC correction
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Paper Abstract

As technology development advances into deep-sub-wavelength nodes, multiple patterning is becoming more essential to achieve the technology shrink requirements. Recently, Optical Proximity Correction (OPC) technology has proposed simultaneous correction of multiple mask-patterns to enable multiple patterning awareness during OPC correction. This is essential to prevent inter-layer hot-spots during the final pattern transfer. In state-of-art literature, multi-layer awareness is achieved using simultaneous resist-contour simulations to predict and correct for hot-spots during mask generation. However, this approach assumes a uniform etch shrink response for all patterns independent of their proximity, which isn’t sufficient for the full prevention of inter-exposure hot-spot, for example different color space violations post etch or via coverage/enclosure post etch.

In this paper, we explain the need to include the etch component during multiple patterning OPC. We also introduce a novel approach for Etch-aware simultaneous Multiple-patterning OPC, where we calibrate and verify a lumped model that includes the combined resist and etch responses. Adding this extra simulation condition during OPC is suitable for full chip processing from a computation intensity point of view. Also, using this model during OPC to predict and correct inter-exposures hot-spots is similar to previously proposed multiple-patterning OPC, yet our proposed approach more accurately corrects post-etch defects too.

Paper Details

Date Published: 16 March 2016
PDF: 7 pages
Proc. SPIE 9781, Design-Process-Technology Co-optimization for Manufacturability X, 978115 (16 March 2016); doi: 10.1117/12.2220778
Show Author Affiliations
Ayman Hamouda, GLOBALFOUNDRIES Inc. (United States)
Dave Power, GLOBALFOUNDRIES Inc. (United States)
Mohamed Salama, GLOBALFOUNDRIES Inc. (United States)
Ao Chen, GLOBALFOUNDRIES Singapore (Singapore)

Published in SPIE Proceedings Vol. 9781:
Design-Process-Technology Co-optimization for Manufacturability X
Luigi Capodieci, Editor(s)

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