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Proceedings Paper

Simple method for decreasing wafer topography effect for implant mask
Author(s): Taejun You; Taehyeong Lee; Gyun Yoo; Youngjoon Park; Cheolkyun Kim; Donggyu Yim
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Paper Abstract

Controlling critical dimension (CD) of implant blocking layers during photolithography has been challenging due to reflection caused by wafer topography. Unexpected reflection which comes from wafer topography makes severe CD variation on mask patterns of implant layer. Using bottom antireflective coatings(BARCs) can reduce the topography effect, but it could also damage wafer surface during BARCs dry etching. Developable BARCs(D-BARCs) could be alternative solution for wafer topography effect. However there are some issues that should be considered in D-BARCs process such as sensitive temperature control and managing defects. There are also papers introducing model based topography aware OPC as a solution for wafer topography effect implant layer. But building topography aware OPC model is very complex and it takes too much time to build.

In this paper, we will introduce experimental results of wafer topography effect using various test patterns and propose a simple method that could effectively reduce wafer topography effect.

Paper Details

Date Published: 15 March 2016
PDF: 8 pages
Proc. SPIE 9780, Optical Microlithography XXIX, 97801E (15 March 2016); doi: 10.1117/12.2219863
Show Author Affiliations
Taejun You, SK Hynix, Inc. (Korea, Republic of)
Taehyeong Lee, SK Hynix, Inc. (Korea, Republic of)
Gyun Yoo, SK Hynix, Inc. (Korea, Republic of)
Youngjoon Park, SK Hynix, Inc. (Korea, Republic of)
Cheolkyun Kim, SK Hynix, Inc. (Korea, Republic of)
Donggyu Yim, SK Hynix, Inc. (Korea, Republic of)


Published in SPIE Proceedings Vol. 9780:
Optical Microlithography XXIX
Andreas Erdmann; Jongwook Kye, Editor(s)

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