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Proceedings Paper

Modeling interconnect corners under double patterning misalignment
Author(s): Daijoon Hyun; Youngsoo Shin
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Paper Abstract

Publisher’s Note: This paper, originally published on March 16th, was replaced with a corrected/revised version on March 28th. If you downloaded the original PDF but are unable to access the revision, please contact SPIE Digital Library Customer Service for assistance.

Interconnect corners should accurately reflect the effect of misalingment in LELE double patterning process. Misalignment is usually considered separately from interconnect structure variations; this incurs too much pessimism and fails to reflect a large increase in total capacitance for asymmetric interconnect structure. We model interconnect corners by taking account of misalignment in conjunction with interconnect structure variations; we also characterize misalignment effect more accurately by handling metal pitch at both sides of a target metal independently. Identifying metal space at both sides of a target metal.

Paper Details

Date Published: 16 March 2016
PDF: 7 pages
Proc. SPIE 9781, Design-Process-Technology Co-optimization for Manufacturability X, 97810F (16 March 2016); doi: 10.1117/12.2219150
Show Author Affiliations
Daijoon Hyun, KAIST (Korea, Republic of)
SAMSUNG Electronics Co., Ltd. (Korea, Republic of)
Youngsoo Shin, KAIST (Korea, Republic of)


Published in SPIE Proceedings Vol. 9781:
Design-Process-Technology Co-optimization for Manufacturability X
Luigi Capodieci, Editor(s)

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