Share Email Print

Proceedings Paper

Layout decomposition and synthesis for a modular technology to solve the edge-placement challenges by combining selective etching, direct stitching, and alternating-material self-aligned multiple patterning processes
Author(s): Hongyi Liu; Ting Han; Jun Zhou; Yijian Chen
Format Member Price Non-Member Price
PDF $14.40 $18.00
cover GOOD NEWS! Your organization subscribes to the SPIE Digital Library. You may be able to download this paper for free. Check Access

Paper Abstract

To overcome the prohibitive barriers of edge-placement errors (EPE) in the cut/block/via step of complementary lithography, we propose a modular patterning approach by combining layout stitching, selective etching, and alternating-material self-aligned multiple patterning (altSAMP) processes. In this patterning approach, altSAMP is used to create line arrays with two materials alternatively which allow a highly selective etching process to remove one material without attacking the other, therefore more significant EPE effect can be tolerated in line-cutting step. With no need of connecting vias, the stitching process can form 2-D features by directly stitching two components of patterns together to create 2-D design freedom as well as multiple-CD/pitch capability. By adopting this novel approach, we can potentially achieve higher processing yield and more 2-D design freedom for continuous IC scaling down to 5 nm. We developed layout decomposition and synthesis algorithms for critical layers, and the fin/gate/metal layer from NSCU open cell library is used to test the proposed algorithms.

Paper Details

Date Published: 16 March 2016
PDF: 10 pages
Proc. SPIE 9781, Design-Process-Technology Co-optimization for Manufacturability X, 97810P (16 March 2016); doi: 10.1117/12.2219082
Show Author Affiliations
Hongyi Liu, Peking Univ (China)
Ting Han, Peking Univ. (China)
Jun Zhou, Peking Univ. (China)
Yijian Chen, Peking Univ. (China)

Published in SPIE Proceedings Vol. 9781:
Design-Process-Technology Co-optimization for Manufacturability X
Luigi Capodieci, Editor(s)

© SPIE. Terms of Use
Back to Top