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Proceedings Paper

Reactive ion etching challenges for half-pitch sub-10-nm line-and-space pattern fabrication using directed self-assembly lithography
Author(s): Yusuke Kasahara; Yuriko Seino; Hironobu Sato; Hitoshi Kubota; Hideki Kanai; Naoko Kihara; Shinya Minegishi; Ken Miyagi; Toshikatsu Tobana; Masayuki Shiraishi; Katsutoshi Kobayashi; Katsuyoshi Kodera; Hitoshi Yamano; Yoshiaki Kawamonzen; Tsukasa Azuma
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Paper Abstract

Directed self-assembly is a candidate process for sub-15-nm patterning applications. It will be necessary to develop the DSA process fully and consider process integration to adapt the DSA process for use in semiconductor manufacturing. We investigated the reactive ion etching (RIE) process for the fabrication of sub-10-nm metal wires using the DSA process and the process integration requirements for electrical yield verification. We evaluated the process using an organic high-chi block copolymer (BCP) with a lamellar structure. One critical issue during DSA pattern transfer involves the BCP bottom connection. The BCP bottom connections could be removed without BCP mask loss by using the optimum bias power and the optimum BCP film thickness. The sub-10-nm DSA line-and-space (L/S) patterns were successfully transferred to a SiO2 layer with sufficient film thickness for the fabrication of the metal wire. We also evaluated the overlay technique used in the process. The connect patterns and cut patterns were overlaid on 10-nm trenches fabricated by the DSA process.

Paper Details

Date Published: 23 March 2016
PDF: 7 pages
Proc. SPIE 9782, Advanced Etch Technology for Nanopatterning V, 97820P (23 March 2016); doi: 10.1117/12.2219081
Show Author Affiliations
Yusuke Kasahara, EUVL Infrastructure Development Ctr., Inc. (Japan)
Yuriko Seino, EUVL Infrastructure Development Ctr., Inc. (Japan)
Hironobu Sato, EUVL Infrastructure Development Ctr., Inc. (Japan)
Hitoshi Kubota, EUVL Infrastructure Development Ctr., Inc. (Japan)
Hideki Kanai, EUVL Infrastructure Development Ctr., Inc. (Japan)
Naoko Kihara, EUVL Infrastructure Development Ctr., Inc. (Japan)
Shinya Minegishi, EUVL Infrastructure Development Ctr., Inc. (Japan)
Ken Miyagi, EUVL Infrastructure Development Ctr., Inc. (Japan)
Toshikatsu Tobana, EUVL Infrastructure Development Ctr., Inc. (Japan)
Masayuki Shiraishi, EUVL Infrastructure Development Ctr., Inc. (Japan)
Katsutoshi Kobayashi, EUVL Infrastructure Development Ctr., Inc. (Japan)
Katsuyoshi Kodera, EUVL Infrastructure Development Ctr., Inc. (Japan)
Hitoshi Yamano, EUVL Infrastructure Development Ctr., Inc. (Japan)
Yoshiaki Kawamonzen, EUVL Infrastructure Development Ctr., Inc. (Japan)
Tsukasa Azuma, EUVL Infrastructure Development Ctr., Inc. (Japan)


Published in SPIE Proceedings Vol. 9782:
Advanced Etch Technology for Nanopatterning V
Qinghuang Lin; Sebastian U. Engelmann, Editor(s)

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