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Proceedings Paper

Interlayer design verification methodology using contour image
Author(s): Minyoung Shim; Seoksan Kim; Sungmin Park; Seiryung Choi; Namjung Kang; Hyunju Sung; Jinwoo Choi; Jaepil Shin; Jaekyun Park; Myoungseob Shim; Hyeongsun Hong; Kyupil Lee
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Paper Abstract

Memory industry has been pursuing endless shrinking technology which increases fabrication complexity. It poses problems between adjacent layers as well as within a single layer. To verify the interlayer design, we have developed the interlayer design verification methodology using contour image. Our methodology makes it possible to verify interlayer design visually by extracting the contour image from the real patterns. And we can verify interlayer design even during the fabrication process and conduct a non-destructive inspection. Also this methodology provides a statistical analysis of massive measured data. Through this methodology, we can calculate the margin of current interlayer design and suggest the requirement of design.

Paper Details

Date Published: 16 March 2016
PDF: 8 pages
Proc. SPIE 9781, Design-Process-Technology Co-optimization for Manufacturability X, 97810V (16 March 2016); doi: 10.1117/12.2218477
Show Author Affiliations
Minyoung Shim, SAMSUNG Electronics Co., Ltd. (Korea, Republic of)
Seoksan Kim, SAMSUNG Electronics Co., Ltd. (Korea, Republic of)
Sungmin Park, SAMSUNG Electronics Co., Ltd. (Korea, Republic of)
Seiryung Choi, SAMSUNG Electronics Co., Ltd. (Korea, Republic of)
Namjung Kang, SAMSUNG Electronics Co., Ltd. (Korea, Republic of)
Hyunju Sung, SAMSUNG Electronics Co., Ltd. (Korea, Republic of)
Jinwoo Choi, SAMSUNG Electronics Co., Ltd. (Korea, Republic of)
Jaepil Shin, SAMSUNG Electronics Co., Ltd. (Korea, Republic of)
Jaekyun Park, SAMSUNG Electronics Co., Ltd. (Korea, Republic of)
Myoungseob Shim, SAMSUNG Electronics Co., Ltd. (Korea, Republic of)
Hyeongsun Hong, SAMSUNG Electronics Co., Ltd. (Korea, Republic of)
Kyupil Lee, SAMSUNG Electronics Co., Ltd. (Korea, Republic of)


Published in SPIE Proceedings Vol. 9781:
Design-Process-Technology Co-optimization for Manufacturability X
Luigi Capodieci, Editor(s)

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