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Proceedings Paper

Degradation of thin Si02 sidewall spacers during selective epitaxial growth for the fabrication of raised source/drain MOSFETs
Author(s): Sreenath Unnikrishnan; Byeong Y. Kim; Chun-Lin Wang; Yun-Kang Wu; Dim-Lee Kwong; Al F. Tasch
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Paper Abstract

Degradation of the electrical breakdown characteristics of SiO2 after exposure to the silicon selective epitaxial growth (SEG) ambient is studied with a view to understand the effect on the sidewall spacers of elevated source/drain MOSFET devices. The effects of the SEG process at 850 degree(s)C-900 degree(s)C on the sidewall dielectric have been evaluated using capacitors with thermally grown or deposited SiO2 gate dielectrics (oxide thicknesses from 15 nm to 30 nm) on polysilicon. Very little degradation of the electrical breakdown characteristics is observed after anneals in a hydrogen ambient indicating that structural void formation due to interfacial reaction between Si and SiO2 does not occur at a rapid rate at these temperatures. Significant degradation is observed when 0.6% DCS is added to the growth ambient, which may be related to the reaction with the Si growth precursors at the SiO2 surface. These results are confirmed by AFM measurements. After anneal in 0.6% DCS in H2 at 1000 degree(s)C, a significant increase in roughness and in the density of etch pits at the SiO2/Si interface is observed compared to similar anneals in a pure hydrogen ambient. Experimental results are also presented comparing the different dielectrics and the impact of Si3N4 spacers.

Paper Details

Date Published: 22 September 1995
PDF: 10 pages
Proc. SPIE 2635, Microelectronic Manufacturing Yield, Reliability, and Failure Analysis, (22 September 1995); doi: 10.1117/12.221456
Show Author Affiliations
Sreenath Unnikrishnan, Univ. of Texas/Austin (United States)
Byeong Y. Kim, Univ. of Texas/Austin (United States)
Chun-Lin Wang, Univ. of Texas/Austin (United States)
Yun-Kang Wu, Univ. of Texas/Austin (United States)
Dim-Lee Kwong, Univ. of Texas/Austin (United States)
Al F. Tasch, Univ. of Texas/Austin (United States)

Published in SPIE Proceedings Vol. 2635:
Microelectronic Manufacturing Yield, Reliability, and Failure Analysis
Gopal Rao; Massimo Piccoli, Editor(s)

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