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Proceedings Paper

Accelerating image filters using a custom computing machine
Author(s): A. Lynn Abbott; Peter M. Athanas; Adit D. Tarmaster
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Paper Abstract

This paper describes the use of the SPLASH-2 custom computing platform for real-time median and morphological filtering images. SPLASH-2 is an FPGA-based attached processor that can be reconfigured to perform a wide variety of tasks. Although not specifically designed for image processing, the architecture is well suited for the repetitive computations and high data transfer rates that characterize most low-level image processing problems. Median filtering is a particularly good benchmark, since nonlinear rank ordering must be performed for 2D neighborhoods at every pixel location in an image. General-purpose workstations are inefficient at such tasks, whereas SPLASH-2 can be configured to perform this at a rate of 30 images per second. This paper presents the hardware/software codesign process that we have used to implement this operation, which can be pipelined with other operations by using additional SPLASH-2 processor boards. The results presented here illustrate that custom computing architectures are much faster than conventional uniprocessors, and offer an attractive altrenative to dedicated special-purpose harware when high performance is required.

Paper Details

Date Published: 19 September 1995
PDF: 9 pages
Proc. SPIE 2607, Field Programmable Gate Arrays (FPGAs) for Fast Board Development and Reconfigurable Computing, (19 September 1995); doi: 10.1117/12.221346
Show Author Affiliations
A. Lynn Abbott, Virginia Polytechnic Institute and State Univ. (United States)
Peter M. Athanas, Virginia Polytechnic Institute and State Univ. (United States)
Adit D. Tarmaster, Virginia Polytechnic Institute and State Univ. (United States)


Published in SPIE Proceedings Vol. 2607:
Field Programmable Gate Arrays (FPGAs) for Fast Board Development and Reconfigurable Computing
John Schewel, Editor(s)

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