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Proceedings Paper

3.8-ms latency correlation tracker for active mirror control based on a reconfigurable interface to a standard workstation
Author(s): Mark Shand; Wang Wei; Goran B. Scharmer
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Paper Abstract

We describe the use of a reconfigurable interface board based on FPGAs and a UNIX workstation to implement a correlation tracker with 3.8ms latency. The correlation tracker is part of an active mirror system in use at the Swedish Vacuum Solar Telescope, La Palma, Canary Islands. The reconfigurable interface is used to leverage the workstation CPU, relieving it of tasks that it performs poorly such as rapid context switching and low-level bit manipulation. The reconfigurable interface handles control of external devices, high- performance input (16 MB/s) and data preformatting. The workstation CPU, a 64-bit microprocessor, performs the bulk of the computation. For the key computations of the correlation tracker we are able to treat 8 pixels in parallel in the CPU's 64-bit integer datapath. We present the structure of the CCD interface configuration and the implementations of the key algorithms on the workstation CPU. We describe the design trade-offs that arose during the development of the system, and demonstrate the symbiosis between components implemented in software and configurable hardware.

Paper Details

Date Published: 19 September 1995
PDF: 10 pages
Proc. SPIE 2607, Field Programmable Gate Arrays (FPGAs) for Fast Board Development and Reconfigurable Computing, (19 September 1995); doi: 10.1117/12.221333
Show Author Affiliations
Mark Shand, Digital Equipment Corp. (United States)
Wang Wei, Swedish Royal Academy of Sciences Research Station for Astrophysics (Sweden)
Goran B. Scharmer, Swedish Royal Academy of Sciences Research Station for Astrophysics (Sweden)


Published in SPIE Proceedings Vol. 2607:
Field Programmable Gate Arrays (FPGAs) for Fast Board Development and Reconfigurable Computing
John Schewel, Editor(s)

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