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Proceedings Paper

100 Gb/s photoreceiver module based on 4ch × 25 Gb/s vertical-illumination-type Ge-on-Si photodetectors and amplifier circuits
Author(s): Jiho Joo; Ki-Seok Jang; Sanghoon Kim; In Gyoo Kim; Jin Hyuk Oh; Sun Ae Kim; Gyungock Kim; Gyu-Seob Jeong; Hankyu Chi; Deog-Kyoon Jeong
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Paper Abstract

We present the performance of 4-channel × 25 Gb/s all-silicon photonic receivers based on hybrid-integrated vertical Ge-on-bulk-silicon photodetectors with 65nm bulk CMOS front-end circuits, characterized over 100 Gb/s. The sensitivity of a single-channel Ge photoreceiver module at a BER = 10-12 was measured -11 dBm at 25 Gb/s, whereas, the measured sensitivity of a 4-ch Ge photoreceiver was -10.06 ~ -10.9 dBm for 25Gb/s operation of each channel, and further improvement is in progress. For comparison, we will also present the performance of a 4-ch × 25 Gb/s photoreceiver module, where commercial InP HBT-based front-end circuits is used, characterized up to 100 Gb/s.

Paper Details

Date Published: 21 March 2016
PDF: 7 pages
Proc. SPIE 9752, Silicon Photonics XI, 97520G (21 March 2016); doi: 10.1117/12.2212740
Show Author Affiliations
Jiho Joo, ETRI (Korea, Republic of)
Ki-Seok Jang, ETRI (Korea, Republic of)
Sanghoon Kim, ETRI (Korea, Republic of)
In Gyoo Kim, ETRI (Korea, Republic of)
Jin Hyuk Oh, ETRI (Korea, Republic of)
Sun Ae Kim, ETRI (Korea, Republic of)
Gyungock Kim, ETRI (Korea, Republic of)
Gyu-Seob Jeong, Seoul National Univ. (Korea, Republic of)
Hankyu Chi, Seoul National Univ. (Korea, Republic of)
Deog-Kyoon Jeong, Seoul National Univ. (Korea, Republic of)

Published in SPIE Proceedings Vol. 9752:
Silicon Photonics XI
Graham T. Reed; Andrew P. Knights, Editor(s)

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