Share Email Print

Proceedings Paper

Integration of BaxSr1-xTiO3 thin film for DRAM application
Author(s): Keiichiro Kashihara; Tomonori Okudaira; Yoshikazu Tsunemine; Yoshikazu Ohno; Hiromi Itoh; Tadashi Nishimura; Makoto Hirayama; Tsuyoshi Horikawa; Teruo Shibano; Kazuo Horie
Format Member Price Non-Member Price
PDF $14.40 $18.00
cover GOOD NEWS! Your organization subscribes to the SPIE Digital Library. You may be able to download this paper for free. Check Access

Paper Abstract

This paper presents a newly developed process technology to integrate the BaxSr1-xTiO3(BST) thin film prepared by an rf magnetron sputtering. Evaluations of the integrated BST capacitors on a test element group (TEG) structure revealed some of key issues for a successful integration. A two-step sputtering method comprising the first step to form a nucleation layer and the second step to form the main part of the BST film was found to be useful for preventing the dielectric properties of the integrated BST thin film from the degradation. A careful control of the shape of the lower structures such as the edge of the bottom electrode or the poly Si plug of the storage node turned to be indispensable to obtain the reliable capacitor and this recommends the extensive use of the process that can provide a flush surface such as the Chemical Mechanical Polishing (CMP) in the future integration. The interlevel dielectrics over the BST capacitor was shown to seriously affect the leakage characteristics and an undoped SiO2 film was most suitable for the integrity, implying the needs for another planarization technique instead of the glass reflow. Finally, a preliminary evaluation of the reliability and the normal bit function of a 4 Mbits DRAM, made of fully flat BST stacked capacitors, demonstrated the utility of the developed integration technology.

Paper Details

Date Published: 15 September 1995
PDF: 9 pages
Proc. SPIE 2636, Microelectronic Device and Multilevel Interconnection Technology, (15 September 1995); doi: 10.1117/12.221125
Show Author Affiliations
Keiichiro Kashihara, Mitsubishi Electric Corp. (Japan)
Tomonori Okudaira, Mitsubishi Electric Corp. (Japan)
Yoshikazu Tsunemine, Mitsubishi Electric Corp. (Japan)
Yoshikazu Ohno, Mitsubishi Electric Corp. (Japan)
Hiromi Itoh, Mitsubishi Electric Corp. (Japan)
Tadashi Nishimura, Mitsubishi Electric Corp. (Japan)
Makoto Hirayama, Mitsubishi Electric Corp. (Japan)
Tsuyoshi Horikawa, Mitsubishi Electric Corp. (Japan)
Teruo Shibano, Mitsubishi Electric Corp. (Japan)
Kazuo Horie, Kinki Univ. (Japan)

Published in SPIE Proceedings Vol. 2636:
Microelectronic Device and Multilevel Interconnection Technology
Ih-Chin Chen; Girish A. Dixit; Trung Tri Doan; Nobuo Sasaki, Editor(s)

© SPIE. Terms of Use
Back to Top