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Proceedings Paper

All-optical SR flip-flop based on SOA-MZI switches monolithically integrated on a generic InP platform
Author(s): St. Pitris; Ch. Vagionas; G. T. Kanellos; R. Kisacik; T. Tekin; R. Broeke; N. Pleros
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Paper Abstract

At the dawning of the exaflop era, High Performance Computers are foreseen to exploit integrated all-optical elements, to overcome the speed limitations imposed by electronic counterparts. Drawing from the well-known Memory Wall limitation, imposing a performance gap between processor and memory speeds, research has focused on developing ultra-fast latching devices and all-optical memory elements capable of delivering buffering and switching functionalities at unprecedented bit-rates. Following the master-slave configuration of electronic Flip-Flops, coupled SOA-MZI based switches have been theoretically investigated to exceed 40 Gb/s operation, provided a short coupling waveguide. However, this flip-flop architecture has been only hybridly integrated with silica-on-silicon integration technology exhibiting a total footprint of 45x12 mm2 and intra-Flip-Flop coupling waveguide of 2.5cm, limited at 5 Gb/s operation. Monolithic integration offers the possibility to fabricate multiple active and passive photonic components on a single chip at a close proximity towards, bearing promises for fast all-optical memories. Here, we present for the first time a monolithically integrated all-optical SR Flip-Flop with coupled master-slave SOA-MZI switches. The photonic chip is integrated on a 6x2 mm2 die as a part of a multi-project wafer run using library based components of a generic InP platform, fiber-pigtailed and fully packaged on a temperature controlled ceramic submount module with electrical contacts. The intra Flip-Flop coupling waveguide is 5 mm long, reducing the total footprint by two orders of magnitude. Successful flip flop functionality is evaluated at 10 Gb/s with clear open eye diagram, achieving error free operation with a power penalty of 4dB.

Paper Details

Date Published: 3 March 2016
PDF: 7 pages
Proc. SPIE 9751, Smart Photonic and Optoelectronic Integrated Circuits XVIII, 97510H (3 March 2016); doi: 10.1117/12.2211152
Show Author Affiliations
St. Pitris, Aristotle Univ. of Thessaloniki (Greece)
Ctr. for Research and Technology Hellas (Greece)
Ch. Vagionas, Aristotle Univ. of Thessaloniki (Greece)
Ctr. for Research and Technology Hellas (Greece)
G. T. Kanellos, Ctr. for Research and Technology Hellas (Greece)
R. Kisacik, Fraunhofer Institute for Reliability and Microintegration (Germany)
T. Tekin, Fraunhofer Institute for Reliability and Microintegration (Germany)
Technical Univ. of Berlin (Germany)
R. Broeke, Bright Photonics B.V. (Netherlands)
N. Pleros, Aristotle Univ. of Thessaloniki (Greece)
Ctr. for Research and Technology Hellas (Greece)


Published in SPIE Proceedings Vol. 9751:
Smart Photonic and Optoelectronic Integrated Circuits XVIII
Sailing He; El-Hang Lee; Louay A. Eldada, Editor(s)

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