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Proceedings Paper

Fabrication issues for silicon backplane active matrix miniature liquid crystal display
Author(s): Ian Underwood; D. C. Burns; I. D. Rankine; D. J. Bennett; James D. Gourlay; Anthony O'Hara; David G. Vass
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Paper Abstract

We describe a new technology which is appropriate for the production of lightweight, highly compact displays. It is based upon a thin layer of ferroelectric liquid crystal (FLC) on top of, and directly driven by, an active matrix backplane fabricated on single crystal silicon. While devices can be produced using fairly standard techniques, we have developed custon fabrication and packaging techniques, required for optimization of optical quality and performance. We have successfully developed the technology for spatial light modulators for use in applications such as optical correlators and programmable holograms. The FLC is configured in the binary surface stabilized configuration: the CMOS circuits are digital in nature. The device operates in reflection with each pixel having an aluminium pad which acts as a mirror to reflect light and as an electorde to control the state of the overlying FLC. The technology also shows promise as a display technology so we have demonstrated the devices as displays capable of displaying both grey scale and color. We have built FLC devices upon commercially fabricated wafers but have found it advantageous to carry out custom post processing order to improve performance. The main thrust to date has been the use of ECR oxide deposition followed by chemical mechanical polishing to provide an optically flat substrate for mirror deposition. This allows the deposition of flat mirrors which fill almost all of the pixel area; it also allows optimization of the mirror deposition for high optical quality and good FLC alignment. Work is also well advanced on a technique to fill the vias connecting to the mirror layer and on packaging devices to reduce bowing of the silicon and increase the thickness uniformity of the FLC layer. Recent results are demonstrated on LCDs fabricated above two silicon backplanes containing 176 X 176 pixels and 256 X 256 pixels respectively, the former having dynamic signal storage at each pixel, the latter static storage.

Paper Details

Date Published: 13 September 1995
PDF: 12 pages
Proc. SPIE 2641, Microelectronic Structures and Microelectromechanical Devices for Optical Processing and Multimedia Applications, (13 September 1995); doi: 10.1117/12.220932
Show Author Affiliations
Ian Underwood, Univ. of Edinburgh (United Kingdom)
D. C. Burns, Univ. of Edinburgh (United Kingdom)
I. D. Rankine, Univ. of Edinburgh (United Kingdom)
D. J. Bennett, Univ. of Edinburgh (United Kingdom)
James D. Gourlay, Univ. of Edinburgh (United Kingdom)
Anthony O'Hara, Univ. of Edinburgh (United Kingdom)
David G. Vass, Univ. of Edinburgh (United Kingdom)


Published in SPIE Proceedings Vol. 2641:
Microelectronic Structures and Microelectromechanical Devices for Optical Processing and Multimedia Applications
Wayne Bailey; M. Edward Motamedi; Fang-Chen Luo, Editor(s)

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