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Proceedings Paper

Unit testing-based approach for reconfigurable logic controllers verification
Author(s): Michał Doligalski; Jacek Tkacz; Arkadiusz Bukowiec; Tomasz Gratkowski
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Paper Abstract

The paper presents unit testing-based approach to FPGA design in-circuit verification. Presented methodology is dedicated to modular reconfigurable logic controllers, but other ip-cores and systems can be verified as well. The speed and reproducibility of tests is key for rapid system prototyping, where the quality and reliability of the system is significance. Typically FPGA are programmed by means single (full) bitstream. Specific devices are able to be reconfigured partially. Usually the partial reconfiguration is a part of the design functionality. It enables the minimization of used resources or provides specific functionality like system adaptation. The paper presents the use of the partial reconfiguration as a toll for the designer. The unit testing approach well know form software engineering was adopted to modular logic controllers development. The simulation process results waveform files, the waveform can be used for synthesizable test bench generation.

Paper Details

Date Published: 11 September 2015
PDF: 9 pages
Proc. SPIE 9662, Photonics Applications in Astronomy, Communications, Industry, and High-Energy Physics Experiments 2015, 96623V (11 September 2015); doi: 10.1117/12.2205922
Show Author Affiliations
Michał Doligalski, Univ. of Zielona Góra (Poland)
Jacek Tkacz, Univ. of Zielona Góra (Poland)
Arkadiusz Bukowiec, Univ. of Zielona Góra (Poland)
Tomasz Gratkowski, Univ. of Zielona Góra (Poland)


Published in SPIE Proceedings Vol. 9662:
Photonics Applications in Astronomy, Communications, Industry, and High-Energy Physics Experiments 2015
Ryszard S. Romaniuk, Editor(s)

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