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Proceedings Paper

A real-time FPGA-based architecture for OpenSURF
Author(s): Chaoxiu Chen; Huang Yong; Sheng Zhong; Luxin Yan
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Paper Abstract

This paper proposes a low-cost FPGA architecture of Speed-Up Robust Features (SURF) algorithm based on OpenSURF. It optimizes the computing architecture for the steps of feature detection and feature description involved in SURF to reduce the resource utilization and improve processing speed. As a result, this architecture can detect feature and extract descriptor from video streams of 800x600 resolutions at 60 frames per second (60fps). Extensive experiments have demonstrated its efficiency and effectiveness.

Paper Details

Date Published: 14 December 2015
PDF: 8 pages
Proc. SPIE 9813, MIPPR 2015: Pattern Recognition and Computer Vision, 98130K (14 December 2015); doi: 10.1117/12.2205633
Show Author Affiliations
Chaoxiu Chen, Huazhong Univ. of Science and Technology (China)
Huang Yong, Shanghai Institute of Radio Equipment (China)
Sheng Zhong, Huazhong Univ. of Science and Technology (China)
Luxin Yan, Huazhong Univ. of Science and Technology (China)


Published in SPIE Proceedings Vol. 9813:
MIPPR 2015: Pattern Recognition and Computer Vision
Tianxu Zhang; Jianguo Liu, Editor(s)

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